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Capgemini
25 mile radius of Porto
9/28/2024
Santa Clara, CA, US
Senior E/E & Semiconductor Engineer - Silicon Validation (SiVal) Engineer
Santa Clara, CA, US
Senior E/E & Semiconductor Engineer - Silicon Validation (SiVal) Engineer
9/25/2024
Santa Clara, CA, US
Senior E/E & Semiconductor Engineer - Synthesis and STA Engineer
Santa Clara, CA, US
RTL Engineer -RTL Signoff Engineer
9/24/2024
Santa Clara, CA, US
Senior E/E & Semiconductor Engineer - Synthesis and STA Engineer
Santa Clara, CA, US
RTL Engineer -RTL Signoff Engineer
9/22/2024
San Jose, CA, US
Genus Synthesis and LEC Engineer
9/20/2024
San Jose, CA, US
Genus Synthesis and LEC Engineer
9/18/2024
San Jose, CA, US
Hardware Design Engineer
San Jose, CA, US
Hardware Design Engineer
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