Rapid advances in communication systems are driving data rates higher. High-performance systems with interconnects between package, substrate, PCB and backplane including multi-die systems require checking for signal and power rail quality or else risk failure. Faster data rates and more complex protocols are exacerbating signal integrity and power integrity (SIPI) compliance requirements. That's why we need talented people in this field to join us on an exciting journey.

Our Analog Mixed Signal IP Team is seeking for Power Integrity Engineer to join our talented team. If you are an experienced Design Engineer who wants to join a team of experts in high-end Analog Mixed Signal design with latest process technologies and a great team player, this can be a perfect position for you.

Responsibilities:Create industrial standard Custom Macro model (CMM) for PHY analog macroControl inputs and outputs quality of CMMCreate higher level of Circuit Profile model for Power integrity purposeCollaborate with other teams to acquire the data, test and provide solutionRelease and do maintenance the releaseBuild spice format vector/ input signal for an analog macro based on a specificationBuild spice format load/ output loading for an analog macro based on a specificationComplete all check lists of the design quality and data quality
Requirements:Bachelor's or Master's degree or above, major in Electrical, Electronic and Telecommunication Engineering, Computer Science, Automation and Control, Mechatronic Engineering or any other relevantFresh graduate or under 2 years of experience in related IC Design is also welcomed and offered on-the-job training to adapt to the position's requirementsGPA is greater or equal to 3.0/4 or 7.0/10Good understanding of circuit theoryGood at communication skills using Vietnamese and EnglishGreat team player, willing to support othersHighly responsible, result orientedSelf-motivated and highly enthusiasm in technology and solving problemsHaving knowledge of scripting languages, e.g., cshell, python, perl or tcl, is a big plus
Opportunities:Our team provides professional trainings for a new member to quickly adapt with the environmentHave a chance to learn the most advanced analog circuit topologies used in UCIe productSynopsys has numerous resources and proficient experts ready to guide you through every obstacleSynopsys provides systematic environments to achieve any goal professionally, from personal to project goalsSynopsys provides a chance to deal with cutting edge technologies. 2.5D/3D IC, High-density data Die to Die (d2d) interfaces which enable us to make very large scale Data Center, AI/ML, 5G applications​​​Synopsys provides a very clear and unique culture which can empower you to achieve your career path, your self-development goalsSynopsys offers comprehensive SIPI solutions and services that complement industry leading interface IP productsDedicated support from company for team building, social activities: Team trip, Family Day, Charity activities…Opportunity to get in touch with the complete design flow of a real complicated Analog Mixed Signal Design from specification to siliconChance to work with bleeding edge technologies like: 2.5D/3D IC, Tbps Die to Die interface that enable Data Center, AI/ML, 5G applicationsClear career path of self-development to either Technical or ManageChance to work and study from many IC experts and travel aboard for training or on-site support
Synopsys delivers leading silicon to systems design solutions that maximize our customers’ R&D capability and productivity. Companies trust Synopsys to pioneer new technologies getting them to market faster without compromise.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.