Analog Design, Principal Engineer
CoWare
We're looking for a Principal Analog Design Engineer to join our team.
Does this sound like a good role for you?
In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed analog integrated circuits in the latest FinFET and gate all around process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.
Job ResponsibilitiesReview SerDes standards to develop novel transceiver architectures and sub-block specifications.Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area and performance targets.Work across project and department teams to streamline design and verification strategies ensure overall design quality, efficiency and performance.Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.Present & review simulation data from internal project teams. Present results externally at industry panels or at customer reviews.Document design features and test plans.Consult on the overall electrical characterization of the SerDes IP product. Analyze customer silicon data for design enhancements. Propose solutions for post-silicon design updates.
Job RequirementsPhD with 10+ years, or MSc with 12+ years of practical analog IC design experience; degree in Electrical Engineering or Computer Engineering or other relevant field of study.Experience with FinFET technologiesExtensive design experience with sub-circuits relevant to SerDes: Receive equalizers such as CTLE, DFE, FFEDAC Based transmitters and ADC based receivers, DSP equalizationHigh speed clocking circuits such as PLL, VCO, ILO, DLL and phase interpolatorADC and DACDuty Cycle Correction, Clock Phase Correction CircuitsDigitally Assisted Analog Calibration LoopsIn depth familiarity with transistor level circuit design - sound CMOS design fundamentals, experience with CMOS tape-outsKnowledge of SerDes, circuit and fabrication issues that directly impact customer use-cases.Aware of ESD issues (i.e. circuit techniques, layout).Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer).Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc)Knowledge of design for reliability (i.e. EM, IR, aging, self heating, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.).Experience with tools for schematic entry, physical layout, and design verification.Knowledge of SPICE simulators and simulation methods.Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.Excellent communication, presentation, and documentation skills
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
The base salary range across the U.S. for this role is between $154,000-$230,000 annually. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
Does this sound like a good role for you?
In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed analog integrated circuits in the latest FinFET and gate all around process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.
Job ResponsibilitiesReview SerDes standards to develop novel transceiver architectures and sub-block specifications.Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area and performance targets.Work across project and department teams to streamline design and verification strategies ensure overall design quality, efficiency and performance.Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.Present & review simulation data from internal project teams. Present results externally at industry panels or at customer reviews.Document design features and test plans.Consult on the overall electrical characterization of the SerDes IP product. Analyze customer silicon data for design enhancements. Propose solutions for post-silicon design updates.
Job RequirementsPhD with 10+ years, or MSc with 12+ years of practical analog IC design experience; degree in Electrical Engineering or Computer Engineering or other relevant field of study.Experience with FinFET technologiesExtensive design experience with sub-circuits relevant to SerDes: Receive equalizers such as CTLE, DFE, FFEDAC Based transmitters and ADC based receivers, DSP equalizationHigh speed clocking circuits such as PLL, VCO, ILO, DLL and phase interpolatorADC and DACDuty Cycle Correction, Clock Phase Correction CircuitsDigitally Assisted Analog Calibration LoopsIn depth familiarity with transistor level circuit design - sound CMOS design fundamentals, experience with CMOS tape-outsKnowledge of SerDes, circuit and fabrication issues that directly impact customer use-cases.Aware of ESD issues (i.e. circuit techniques, layout).Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer).Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc)Knowledge of design for reliability (i.e. EM, IR, aging, self heating, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.).Experience with tools for schematic entry, physical layout, and design verification.Knowledge of SPICE simulators and simulation methods.Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.Excellent communication, presentation, and documentation skills
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
The base salary range across the U.S. for this role is between $154,000-$230,000 annually. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
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