At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

Responsibilities: DDR I/O Circuit design

Requirements-

Qualification: BTech/MTechSkills/Experience: 5+ yearsKnowledge of CMOS processes and issues in deep submicron process technologies.CMOS circuit design and layout methodology & flow; basic understanding of analog/mixed signal circuitry, familiarity with basic ESD concepts is an advantage.Familiarity with ASIC design flow.Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus.Ability to execute assigned circuit design tasks with best product quality and efficiency.Good written and verbal communication skills in interactions with internal development teams.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, or disability.