San Jose, California, US
6 hours ago
ASIC Design Engineer - Cisco Silicon One
The application window is expected to close by:  11/19/2024.

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

This is an onsite role and will require working out of the Milpitas/San Jose office location.

Meet the Team

Cisco Silicon One (#CiscoSiliconOne) brings together networking, compute and storage all in a single system. Come join us and take part in shaping Cisco’s revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, Security etc.). Our Hardware and Software solutions are tightly coupled with the development cycles that give us an unparalleled advantage in enabling our customers adopt the latest what technology can offer. As part of Cisco Silicon One (#CiscoSiliconOne) our team develops complex, high-performance, feature-rich ASICs used in Cisco's networking products and third-party custom-built hardware solutions. 
 Your Impact
Be part of the development organization as an ASIC Design Engineer with primary focus on RTL DesignCreate micro-architecture specifications and participate in reviewsImplement Verilog RTL to meet timing and performance requirementsHelp define, evolve, and support our design methodologyCollaborate with the verification team on as-needed basis to address design bugs and close code coverageWork closely with physical design team to close design timing and place-and-route issuesTriage, debug, and root cause simulation, software bring-up, and customer failures. Perform diagnostic and post silicon validation tests in the labMinimum Qualifications:
Bachelor's degree in Electrical or Computer Engineering and 4+ years of related work experience; Master’s Degree in EE and CE and +3 years of related experience; PH.D. in EE and CE and 0 years of related experiencePrior experience with Verilog/System Verilog programming skillsPrior experience with simulators/synthesis/static timing constraints and related toolsKnowledge of verification methodologies and flowKnowledge of interactive and waveform debug skillsPreferred Qualifications:Understanding of Networking technologies and conceptsExperience with ARM protocols (AXI, CHI, APB. AHB) and exposure to ARM CPU’s is desirableDesign experience in any of  Ethernet MAC, DDR, PCIE, DMA, Cache controllers is a big plus, Experience with integrating 3rd party IP’s is desirableScripting experience (Python, Perl, TCL, shell programming) highly desirableExperience with formal verification tools is a plusExperience with emulation is a plusWritten and verbal communication skills #WeAreCisco

#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.  Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best. We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do!  Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!
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