ASIC Verification Engineer

Our LPDDR PHY IP team is looking to add a Digital ASIC Verification Engineer to our team. In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers.  

Key Qualifications

BSEE in EE with 3+ years of relevant experience or MSEE with 1+ years of relevant experienceExperience in ASIC RTL design and verification at the chip level and block levelStrong Verilog, system Verilog, UVM, PERL, and TCL skillsKnowledge in silicon debuggingDemonstrates good communication skills in both Mandarin and EnglishDemonstrates good analysis and problem-solving skillsKnowledge of high speed interface protocols is a plusInclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.