ASIC Digital Design, Staff Engineer
Synopsys (formerly Synfora)
Key QualificationsBS/MS student in electrical engineering, computer science or equivalentUnderstanding of Digital design concepts and basic circuits operation5 to 7 years of experience in ASIC front end designExcellent digital design skills Hand on experience on MIPI MPHY is a plusExperience in any high speed protocol(UFS/PCIE/USB) design Knowledge of UFS, UniPro is an added advantageExperience in Synthesis, DFT and Static Timing AnalysisPreferred ExperiencePrior working knowledge of any of tools Design compiler/Formality, Spyglass, Prime time or DFT Tetramax are preferred.Has good communication skills (written and verbal English)Has willingness to study new things and enhance knowledgeSelf-motivated personality with minimum supervision
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