The application window is expected to close on: January 30th 2025
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Meet the Team
Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle.
Your Impact:
You will gain hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the best industry practices, from specification through tape-out and lab validation.
You will:
Minimum Qualifications:
7+ years ASIC design verification experience with a bachelor’s or master’s degreePrior experience with ASIC verification using UVM/System Verilog.Prior experience in verifying complex blocks, clusters and top level for SoCPrior experience building test benches from scratch, hands on experience with System Verilog constraints, structures and classes.Prior experience with cross-functional teams, and possess the drive to learn and growPrior experience on one or more protocols – PCIe, Ethernet, RDMA, TCPPreferred Qualifications:
Prior experience leading a team of engineers to complete verification of a complex block, cluster or chip-level designLead verification for a complete SOC or ASIC iPrior Experience with Forwarding logic/Parsers/P4 Formal verification (iev/vc formal) knowledge
#WeAreCisco
#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.
Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.
We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do!
Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!