**Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat and Hierarchical Clock Domain Crossing and work with the designers to analyze the complex clock domain crossings and sign off the CDC. 2. Perform Flat and Hierarchical Reset Domain crossing Checks. Understand the Reset-Architecture by working with Design and FW teams and develop reset groups and the corresponding reset sequence for RDC. 3. Perform RTL Lint and work with the Designers to create waivers. 4. Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults. 5. Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power. 6. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC,). 7. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. **Minimum Qualifications:** Minimum Qualifications: 8. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. 9. 5+ years of experience in static verification tools 10. Experience with Lint, Clock Domain & Reset Domain crossing. 11. Experience with SOC CDC signoff 12. Knowledge of SOC Integration (Clocking, Reset, PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design using SystemVerilog or other HDL. 15. Experience with communicating across functional internal teams and vendors. **Preferred Qualifications:** Preferred Qualifications: 16. Experience with SOC Design Integration and Front-End Implementation. 17. Knowledge of Timing/physical libraries, SRAM Memories. 18. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools. 19. Experience with Netlist-CDC Analysis and improving MTBF 20. Experience with developing structural rule based checks for RTL & Netlist 21. Scripting and programming experience using Perl/Python, TCL, and Make. **Public Compensation:** $142,000/year to $203,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment. Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.