ASIC Library Engineer
Cisco
The application window is expected to close on 12/17/25. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
Meet the Team
Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. This role sits on our ASIC team providing infrastructure support for RTL implementation to gates.
You are responsible for ensuring the development, testing, and quality analysis of library IP used for ASIC implementation.
* Re-characterization of standard cell libraries to various Process/Voltage/Temperature parameters
* Develop and perform quality analysis checks on library timing/power values, and checks on consistency across views e.g. (Verilog, LEF, GDS, etc)
* party IP
* party IP
* Memory macro compilation, testing, and release
Minimum Qualifications:
* Typically a Bachelor’s + 7 years of related experience, or Masters + 4 years of related experience, or PHD + 1 year of related experience.
* 7nm and below
* Prior experience with CAD methodologies from Cadence, Synopsys and/or Mentor
* Experience scripting/coding with TCL and Python/Perl
* Solid analytical, communication and presentation skills
Preferred Qualifications
* Experience with Finfet technology
* Experience analyzing data and presenting in front of an audience
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Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
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