By living according to a common set of values, we create a culture that unifies, embraces the uniqueness we all bring to the company, and positions Integer for long-term success.
At Integer, our values are embedded in everything we do.
Customer
We focus on our customers’ success
Innovation
We create better solutions
Collaboration
We create success together
Inclusion
We always interact with others respectfully
Candor
We are open and honest with one another
Integrity
We do the right things and do things right
Company OverviewInteger Holdings Corporation (NYSE:ITGR) is the largest medical device outsource (MDO) manufacturer in the world serving the cardiac, neuromodulation, orthopedics, vascular, advanced surgical and power solutions markets. The company provides innovative, high quality medical technologies that enhance the lives of patients worldwide.
The Montevideo site is focused on developing active Neurostimulation devices for multiple applications. On the ASIC design team, we strive to miniaturize these devices even further, to enhance functionalities, reduce volume and extend its life cycle. Giving our end-users a better experience and quality of life when being implanted with our devices.
Job SummaryAs a Junior Analog Design Engineer, you will contribute to the development of low-power analog circuits for implantable pulse stimulators.
You will engage on the full process from design specification to post-silicon characterization. You will be part of a research team focusing on creating the next-gen platforms for neurostimulation implantable devices.
Key responsibilitiesAnalog IC Development: design the analog circuits for neural stimulation devices focusing on low-power design and following tight design constraints such as area, stability, frequency, and compliance voltage. You will own the circuit from design to layout and testing, working thigh with the team to match system level requirements.Circuit Design and Simulations: Be able to perform transistor-level schematic design, pre-layout simulations to optimize for requirements and post-layout to check if constraints were met. You should have knowledge on Operational amplifiers, Current Mirrors, Biasing Techniques, Reference Generation and Parasitics effects on analog circuitry. Layout: Be able to perform transistor level layout following the best practices for fabrication yield and matching. Optimizing area and preventing unwanted effects from real components.Post-silicon testing: Perform lab-based silicon characterization.Documentation: Capture designs with large detail, producing documentation for knowledge sharing and quality assurance. Participate in peer reviews to ensure compliance and robustness.RequirementsBachelor’s degree or above in Electronics Engineering (Student on a final year will also be considered)1+ years with demonstrable work (or course work) in the Analog Design field.Experience in analogue circuit design fundamentals (DP, CM, OPAMP, Parasitics, Frequency response, stability criteria, analog switches, CMOS small and large signal models, etc.)Experience in transistor layout and physical verification flows (DRC/LVS/PEX).Proficient in EDA usage tools (Cadence, Synopsis, Mentor) and fast learning capabilities to use them.Strong team player with exceptional attention to detailAdvanced English language skills, writing documentation and talking with providers/customers/DesirableExperience in digital design with knowledge of digital flow and Verilog.Experience in complex mixed-signal circuits such as DACs, ADCs, PLLs and DC-DC converters.Ability to learn and adapt to a start-up environment inside a big corporation.U.S. Applicants: EOE/AA Disability/Veteran