You will work as a member of the hardware development team in our Optics R&D Center. We offer a supportive and innovative work environment, space for individual thinking and creativity, encouraging atmosphere, flexible working time with home office opportunity, competence development and career opportunities, sports and leisure time activities. 

We are currently looking for highly motivated professionals to join our team, who possess a solid understanding of electronic engineering, to shape the future of optical data transmission. As a HW architect and board design engineer you will be part of the hardware development team, embedded in a worldwide Optical Research and Development organization.

 

Master Degree or Ph.D. in Electronic or Telecommunication Engineering Experience with digital and analog electrical design techniques and control-loop concepts, especially related to PLL and Servo design and implementation (hardware and/or firmware based) and high-performance clock-distribution. Knowledge of international standards for clock accuracy and Precision Timing Protocol (IEEE-1588v2ITU-T G.8273.2 and G.8273.3, ITU-T G.8262 and G.8262.1) Solid understanding of synchronization and timing terms (Clock accuracy, Jitter, Wander, Noise generation and transfer, MTIE and TDEV, SyncE, PTP, ToD, PPS, transmission path latency and minimization of latency asymmetry) Knowledge of simulation tools and languages for electrical design and for signal integrity Knowledge of electrical design and layout tools Scripting languages (e.g. Python, tcl, LabView) Microsoft Office Good communication skills Italian or German & English fluently spoken and written Strong interest and ability to in collaboration with international partners Personal flexibility and agility to provide high quality results in challenging environment.
  Contribute to system architecture investigations and board feasibility studies in close collaboration with system engineering, system test and HW, SW and ASIC/FPGA development teams Support system requirement definition for synchronization and timing functions Define HW architecture of synchronization and timing functions within optical transmission systems Create specification of synchronization and timing subsystems Select key devices for synchronization and timing functions Schematic entry of synchronization and timing cards Unitary tests of synchronization and timing cards Review test reports summarizing findings and recommendations Support System Test and Test Engineering Participate in reviews of pertinent PLM and R&D documents (feature specifications, requirements, etc) Support Investigations of Customer and Field issues Collaborate with teams in international Nokia locations.