Hardware Engineering, Sr Staff Engineer
Synopsys (formerly Synfora)
Job Description & RequirementsJob Description and Requirements
Synopsys is uniquely positioned to offer the most comprehensive prototyping solution in market today. HAPS system is the prototyping solution of Synopsys ASIC validation flow, it’s the industry’s performance & capacity leader in prototyping.
As a hardware designer, candidate will be primarily responsible for successful deployment of HAPS related board design including its validation. He or she will closely work with AE and customers to propose and design/validate protocol interface card solution on HAPS which can be a reference design kit.
Candidate should be also able to investigate/understand schematics and layout of HAPS daughter board to debug any PCB issues. The position offers a great opportunity not only to grow by learning kinds of peripheral interface solution but also communication skills and project management capability from Synopsys.Education RequirementsCollege degree(or above) in Electrical Engineering/ Computer Science relatedSkills/ExperienceGood team player and communication skillsGood experience on porting RTL to FPGA using Vivado or Synplify/Protocompiler/Protosynthesis or 3rd party FPGA synthesizerGood expertise on one of the following FPGA prototyping platforms such as HAPS/S2C/TalentPros etc. where with related FPGA compile/runtime/debug experience is appreciated and preferredFamiliar with one of following protocols: MIPI/HDMI/AMBA/USB/PCIE/DDRx etc.Experience on Driver/FW/SOC FPGA debug/developmentFamiliar with simulation and debug tools such as VCS and Verdi/LINTFamiliar with scripting language like Perl/Python/Tcl/CSH/BASH/MakefileFluent English on reading/writing (esp. technical spec) Nice to have Experience on hardware board design tools such as Orcad/PADS and AllegroExperience on multi FPGA partition with well timing constraint knowledgeExperience on Xilinx high speed IO application such as using GTH/GTYExperience on Xilinx EDK/Vitis development tools
Synopsys is uniquely positioned to offer the most comprehensive prototyping solution in market today. HAPS system is the prototyping solution of Synopsys ASIC validation flow, it’s the industry’s performance & capacity leader in prototyping.
As a hardware designer, candidate will be primarily responsible for successful deployment of HAPS related board design including its validation. He or she will closely work with AE and customers to propose and design/validate protocol interface card solution on HAPS which can be a reference design kit.
Candidate should be also able to investigate/understand schematics and layout of HAPS daughter board to debug any PCB issues. The position offers a great opportunity not only to grow by learning kinds of peripheral interface solution but also communication skills and project management capability from Synopsys.Education RequirementsCollege degree(or above) in Electrical Engineering/ Computer Science relatedSkills/ExperienceGood team player and communication skillsGood experience on porting RTL to FPGA using Vivado or Synplify/Protocompiler/Protosynthesis or 3rd party FPGA synthesizerGood expertise on one of the following FPGA prototyping platforms such as HAPS/S2C/TalentPros etc. where with related FPGA compile/runtime/debug experience is appreciated and preferredFamiliar with one of following protocols: MIPI/HDMI/AMBA/USB/PCIE/DDRx etc.Experience on Driver/FW/SOC FPGA debug/developmentFamiliar with simulation and debug tools such as VCS and Verdi/LINTFamiliar with scripting language like Perl/Python/Tcl/CSH/BASH/MakefileFluent English on reading/writing (esp. technical spec) Nice to have Experience on hardware board design tools such as Orcad/PADS and AllegroExperience on multi FPGA partition with well timing constraint knowledgeExperience on Xilinx high speed IO application such as using GTH/GTYExperience on Xilinx EDK/Vitis development tools
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