Company:Qualcomm Semiconductor Limited

Job Area:Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Innovative standard cell circuit designer who excels in collaboration with various stakeholdersPathfinding of new logic technologies and creating library methodologiesCompetitive PPA analysis and driving stdcell library/logic in high performance CPU  PPA differentiationSi validation of libraries with tracking yield, Vmin, power, and performanceLeading failure analysis and maintaining reliability specification up to date

Qualifications:

Knowledge in the digital CMOS circuit and layout designsExperiences in process technologies or SOC P&R designs desiredFamiliarity with foundry ecosystems desiredExcellent communication and interpersonal skills to lead internal and external teamsMS or Ph.D. or BS with experience  in Electrical Engineering, Computer Science desired

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

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