Job Description

As an IP Verification Engineer Student, you will play a critical role in ensuring the flawless execution of integrated circuit designs to meet the highest standards of quality and performance. You will collaborate closely with design teams to verify and validate IP designs, ensuring that they align with the project specifications.

Key Responsibilities:

Design Compliance Assurance: Thoroughly assess and validate integrated circuit designs to ensure they comply with all company-defined requirements and specifications.

Flaw Identification and Resolution: Expertly identify design flaws, inconsistencies, and potential issues, and collaborate with cross-functional teams to resolve them promptly.

Quality Assurance: Contribute to the development of verification environments that are robust and efficient, enhancing the overall quality of the product, service, or system.

Simulation and Debugging: Lead the execution of comprehensive simulations to thoroughly test and validate designs, while effectively troubleshooting and debugging any issues that arise.

Performance Optimization: Continuously improve verification processes, methodologies, and tools to enhance efficiency and ensure that products, services, or systems perform as expected.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

Candidate must be pursuing a BS degree in Electronic, Electrical engineering, computer science, or a related field of study

Intermediate English Level

6+ months experience in VLSI, System Verilog / OOP/OVM/UVM or related/relevant experience.

6+ months python programming experience.

Preferred Qualifications:

(knowledge in any of the following areas is a plus)

IP-level design and/or verification.

SOC-level design/integration and/or validation.

RTL quality checks.

Simulation-based debug (VCS, Verdi, DVE).

Computer(CPU) and/or System (Platform) Architecture.

Front-end Design TFMs (Tools, Flows, and Methodologies).

Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.