Our Analog Mixed Signal (AMS) team is seeking for an Analog Mixed Signal (A&MS) Layout Engineer to join our talented team. If you are an experienced A&MS Layout Engineer who wants to join a team of experts in high-end Analog Mixed Signal design with the atest process technologies and a great team player, this can be a perfect position for you.
 ​​​​​Responsibilities: Work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees...Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematicsUnderstand and apply Analog Layout techniques to ensure design meet performance with minimum area and good yield. Participate in building and enhancing layout flow for faster, higher quality design process. Do layout verification for DRC/LVS/ERC/ANT/ESD/DFMDo PERC verification for ESD/LUP checksComplete all design quality checks and data quality checksWork with Place and Route engineer to integrate analog layouts into top level.Work with Package team to ensure the integration of top die and packageDo design reviews across global team May collaborate in package design (interposer design, RDL design)Work closely with design team in Viet Nam, USA, Canada and other countries to ensure the success of the whole product. May join research programs to implement new ideas for future products and flowsMay lead a layout team to complete a full design blockMentor junior layout engineers or internsAuthorities: Schedule and manage work flow, tasks, design data/documentations.Normally receives little instruction on day-to-day work, general instructions on new assignments.Demonstrates good judgment in selecting methods and techniques for obtaining solutions.Requirements:Bachelor's or Master's degree or above, major in Electrical, Electronic and Telecommunication Engineering, Computer Science, Automation and Control, Mechatronic Engineering or any other relevant.From 3 years of experience in custom layout. Familiar with Layout entry tools: Cadence, SynopsysFamiliar with Layout verification tools: Mentor Calibre, Synopsys ICVUnderstand basic semiconductor fabrication processesUnderstand MOSFET fundamentalsUnderstand layout techniques for high speed, matching, ESD, Latchup, Antenna, EMIR. Experienced with mentoring/leading junior layouts to complete a design. Experienced with writing layout review presentations and layout verification reportsGood at English communicationStrong team player, Self-motivated, humble, honest and willing to learn. OpportunitiesSNPS is the world number one IP provider. To be trained and developed by many experts from around the world and talented highly motivated Viet Nam engineering teamProfessional, innovative, fair and fun working environment. Strong culture company.Competitive salary and benefit. Strong support from company for health: Insurance, Sport clubs: Football, Ping-Pong, Badminton, Yoga, Zumba …Strong support from the company for team building, social activities: Team trip, Family Day…Opportunity to get in touch with the complete design flow of a real complicated Analog Mixed Signal Design from specification to silicon.Chance to work with bleeding-edge technologies that enable Data Center, AI/ML, 5G applications.Clear career path of self-development to either Technical Expert or Design Leader/ManageTravel to USA, Europe and Asia for training or on-site support.
Synopsys delivers leading silicon to systems design solutions that maximize our customers’ R&D capability and productivity. Companies trust Synopsys to pioneer new technologies getting them to market faster without compromise.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.