Position: Platform & ASIC Research Intern
Number of Position(s): 2
Duration: 10 Weeks
Date: June 2 – August 8, 2025
Location: Hybrid (New Providence, New Jersey)

Education Recommendations

Currently a candidate for a Ph.D. degree in Computer Science, Electrical Engineering, Computer Engineering, or Engineering in VLSI and telecommunication or related field with an accredited school in the US.

*Highly qualified Master's students will be considered

What is Nokia looking for from me: (at least one of the below)

Advanced RTL development skills and fluent in HDL (SystemVerilog and VHDL) and/or HLS (High-level Synthesis) Experience in ASIC physical design tools: Cadence (Innovus, Spectre, Virtuoso) and Synopsys (VCS, ICC) Knowledge in micro-architecture, gate or RTL-level design optimization, timing closure analysis, and/or mixed-signal circuit design Experience with AI/ML development environment and tools, e.g. ONNX, Tensorflow, PyTorch Advanced programming skills in C/C++, Python, MATLAB, etc. Background in compiler, operating system, and kernel-level embedded software programming for parallel systems

As part of our team, you will:

Work with seasoned Bell Labs researchers on the design and development of ASIC and/or proof-of-concept platforms. Participate in a research project, work with a mentor(s) to define, develop, and conduct a research project, also can attend research talks in various technology areas. Platform and ASIC research project will be in any of the following areas: Machine Learning Acceleration Digital signal processing and accelerator for 5G/6G communication systems Cloud-based radio access network Technologies for high-performance and scalable System-on-Chip design Application of new devices, e.g., memristor