Come and be a part of the team creating SoC and chip-set designs and products for Intel Client and Auto Business. This position is a role within the ISCP's SOC Front-End Design team, building SoC products for client and automotive markets.
We are seeking a highly skilled Technologist/Sr. Technologist with broad expertise in Front-end SoC design and development, who can enable, deploy and drive front-end validation, design, and environment efficiencies for faster, more effective, higher quality SoCs.
The Role and Responsibilities span a variety of levels of engagement, including but not limited to:
- Define and develop validation strategies and methodologies to comprehensively validate our SoCs
- Identify and address ongoing inefficiencies in how we build SoCs, and deploy proactive solutions to prevent these
- Continuous retrospectives to find and analyze gaps, and identify actions, and drive to deploy them
- Collaborate with EDA vendors in enabling tools and technologies, defining and driving requirements back to the vendors for efficiencies and speed
- Actively mentor and develop next-generation technical leaders
You must possess a proven track record of below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with more than 15 years of technical experience
- Related technical experience should be in/with: Silicon Design and/or Validation/Verification.
- Design and/or Design Verification with developing, maintaining, and executing complex IPs and/or SOCs.
- Good exposure to EDA tools and optimized use of these tools
- OVM/UVM, System Verilog, constrained random verification methodologies.
- The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure)
- Strong leadership skills with the ability to lead cross-functional teams and drive collaboration.
- Must be skilled to influence in heavily matrixed environment.
- Capable to operate in ambiguity where roles may not be clearly defined or teams across multiple/functions and IP/SOC must be pulled together.
Preferred Qualifications:
- Experience in chipset architecture/design
- Domain expertise in one or more of PCIe, CXL, Fabric, Power mgmt
Annual Salary Range for jobs which could be performed in the US $219,352.00-$351,256.00
*Salary range dependent on a number of factors including location and experienceWorking ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.