Job Description

The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people's digital lives.

Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, come join us to do something wonderful.

In this role you will work on key manageability IP that goes into all Intel server products and is used by cloud customers to diagnose problems in their data centers.

Responsibilities will include but are not limited to:

Develop pre-Silicon functional validation tests to verify system will meet design requirements.Create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.Analyze and use results to modify validation environment to verify RTL design.

In addition to the qualifications a successful candidate will demonstrate:

Problem solving and debugging skills.Willingness to work closely with various chip design disciplines and cross site teams.Verbal and written communication skills.Motivated, self-directed and can work effectively both independently and in a team environment.
Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must have at least one of the following:

Bachelor's of Science degree in Electrical/Computer Engineering or related field with 3+ years of industry experience – ORMaster's of Science degree in Electrical/Computer Engineering or related field with 2+ years of industry experience.

Preferred Qualifications:

Experience in UVM/OVM.Using scripting languages in design automation using languages such as TCL, Perl, JSON, Python.Creating and optimizing the complex validation environment and generating focused and random test cases, analyzing coverage and debugging failure cases.Developing end to end checking solutions.Performing IP and/or SoC functional validation.Using System Verilog.Using Jasper Gold based formal verification.
Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Hillsboro


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in the US $139,710.00-$197,230.00
*Salary range dependent on a number of factors including location and experience


Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.