Northrop Grumman, Mission Systems is seeking a candidate for the position of Principal/Senior Principal Custom IC Layout Engineer in the Hardware Synergy Electrical Design and Integrated Circuit (EDIC) organization. The position is based on-site out of our Baltimore, MD, Morrisville NC or Rolling Meadows IL, location and may be staffed as a hybrid role.
Here at Northrop Grumman, we design, manufacture, and test semiconductor products for internal and commercial production and emerging programs.
Responsibilities include:'
• Creating and verifying hierarchical mixed-signal layouts of chips or circuits such as ADCs, DACs, PLLs, Band Gaps, Voltage Regulators, etc. with guidance from circuit designers.
• Strong communication skills and understanding how layout impacts circuit performance are a must.
• Interpreting results from layout verification tools such as Calibre DRC/LVS or Cadence Assura/PVS.
• Creating/reviewing/analyzing/modifying floor plans drawn from the top-down perspective.
• Creating staffing plans and schedule estimates for layout related tasks.
• Delivering verified layout on-time according to plan.
• Participate in reticle composition and/or support of tape-out activities.
• Create and document flows for future re-use and quality control
This position may be filled as a Principal Custom IC Layout Engineer or a Senior Principal Custom IC Layout Engineer
This position is contingent on the ability to obtain/maintain a US Secret Clearance or higher and contract award
Basic Qualifications for Principal Custom IC Layout Engineer:
Bachelor's of Science in Electrical Engineering or similar STEM degree and 5 years of relevant work experience, OR Master's degree with 3 years of relevant work experience, OR Ph. D. with 1 year of practical work experience. Will consider additional 4 years of applied experience in lieu of degree requirementsUnited States Citizenship requiredAbility to obtain and maintain a DoD Secret Clearance or higherExperience laying out custom analog/custom digital/custom RF cellsProficient in floor planning especially top-down, area optimization, and handling critical devices and signals with the proper care.Demonstrated expertise developing high quality layouts for complex Analog and Mixed Signal (“AMS”) designs using Cadence Virtuoso XL/GXL.Experience using Cadence Layout XL (a power user) to do full custom layout of complete mixed signal ICs and/or test structures.Debugging skills of results generated by industry standard layout verification tools.Demonstrated expertise isolating critical analog blocks from noisy sources through layout noise coupling suppression techniques.Knowledge of how to address EM/IR issues, prevent latch-up, mitigate ESD, and ensure matching.Basic Qualifications for Senior Principal Custom IC Layout Engineer:
Bachelor's of Science in Electrical Engineering or similar STEM degree and 8 years of relevant work experience, OR Master's degree with 6 years of relevant work experience, OR Ph. D. with 4 years of practical work experience. Will consider additional 4 years of applied experience in lieu of degree requirementsUnited States Citizenship requiredAbility to obtain and maintain a DoD Secret Clearance or higherExperience laying out custom analog/custom digital/custom RF cellsProficient in floor planning especially top-down, area optimization, and handling critical devices and signals with the proper care.Demonstrated expertise developing high quality layouts for complex Analog and Mixed Signal (“AMS”) designs using Cadence Virtuoso XL/GXL.Experience using Cadence Layout XL (a power user) to do full custom layout of complete mixed signal ICs and/or test structures.Debugging skills of results generated by industry standard layout verification tools.Demonstrated expertise isolating critical analog blocks from noisy sources through layout noise coupling suppression techniques.Knowledge of how to address EM/IR issues, prevent latch-up, mitigate ESD, and ensure matching.Preferred Qualifications:
Knowledge of semiconductor device physics, process development, analog/mixed signal integrated circuit design, manufacturing, and testingExperience using SKILL, Perl, C-Shell, and/or Python to increase layout productivity.Experience using Cadence Virtuoso's other advanced features (GXL, EAD, and Constraint Manager).PCell creation experience.Demonstrated expertise creating a floorplan of a complete IC to minimize parasitic issues related to layout and packaging.Experience in deep submicron CMOS circuits with finFETs and dual patterningTechnical understanding of IR drop, RC delay, electro-migration, self-heating, and coupling capacitance.Current/Active Secret clearanceThis position's standard work schedule is a 9/80. The 9/80 schedule allows employees who work a nine-hour day Monday through Thursday to take every other Friday off.
As a full-time employee of Northrop Grumman Mission Systems, you are eligible for our robust benefits package including:
Medical, Dental & Vision coverage401kEducational AssistanceLife InsuranceEmployee Assistance Programs & Work/Life SolutionsPaid Time OffHealth & Wellness ResourcesEmployee DiscountsLink to Benefits: https://totalrewards.northropgrumman.com/
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.
Salary Range: $102,400.00 - $153,600.00Salary Range 2: $127,000.00 - $190,600.00The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.Employees may be eligible for a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.