Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!As a Principal Software Engineer at Arteris, you will have opportunity to be part of a validation team with leading-edge Electronic Design Automation expertise and you will work on the most advanced SoC assembly and Hardware/Software interface flows.You will join a proven-successful company, and be able to influence development environment, architecture, verification, and everything in-between. Responsibilities:Lead the software architecture of Arteris Register Bank compiler including RTL/UVM RAL, C-HAL and Documentation generators. Technical lead coaching other team members, performing code reviews, approving merge requests and providing industry expertise.  Contribute to design, documentation and software development for Arteris Register Bank compiler in C++ and Java. Involved in validation test definition (Python, Perl and C++ ).   tests in the continuous integration flow, improve metrics, and increase automation. Help improve and refine processes, methodologies, and metrics.  Experience, Requirements and Qualifications:12+ years of industry experience as semiconductor CAD flow developer (Electronic Design Automation). Demonstrated experience designing and building software frameworks to assemble and verify complex System-on-Chips. In-depth understanding of XML IP-XACT standard for hardware-software interface. Expert in Hardware RTL design and verification languages (VHDL, Verilog, SystemC, SystemVerilog) Able to run on any available RTL simulator (Cadence, Synopsys, etc.) and proficient with UVM RAL and C HAL. Experience with C / C++, Java, Tcl and Python required. Perl is a plus. Good written and verbal communication skills in both French and English Curious, autonomous, rigorous, and delivery-oriented with a commitment to quality and a thorough approach to the work.   Education: Master degree in EE (Electrical Engineering) or CS (Computer Science)  About Arteris: Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.    With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease.  Learn more at arteris.com.