R&D Engineering, Principal Engineer
Sypnosis
Synopsys Inc. is looking for a full-time candidate to work on the industry's leading and fastest emulation system, Zebu Server, which offers the industry's largest design capacity, supporting SOC chips as large as 10 billion gates based on high-density 20 nano-meter FPGA technology. In Zebu emulation flow, the design under test is partitioned into multiple parts, each of which is compiled into a low-level binary bit-stream that can be downloaded and run on an underlying FPGA in the emulation hardware.
This role involves working in a global multi-site team specializing in areas such as Behavioral compiler and DPI, Clock Processing, Timing Analysis, Performance Tuning and Runtime Throughput. The responsibilities include innovating and brainstorming ideas to solve challenging practical problems, developing software based on the idea, and demonstrating the effectiveness of it by running benchmarking designs and comparing the results.
Job requirements:MS/Ph.D. Degree in Computer Science, Computer Engineering, or Electrical Engineering.10+ years of software development experience in developing and testing large C++ applications in Linux environment.Ability to understand complex problems and propose creative and efficient solutionsExperience with efficient algorithm and data structure design.Understanding of digital logic design, FPGA architecture, and hardware description language (like Verilog, System Verilog).EDA knowledge preferred, especially in partitioning, place-and-route, static timing analysis, synthesis or timing closure for large capacity and high-performance designs.Machine learning experience is preferred but not mandatory.Highly developed interpersonal skills and the ability to work well either in a team-based environment or autonomously.The base salary range across the U.S. for this role is between $152,000 - $228,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Stay Connected: Join our Talent Community
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
#LI-MS2
This role involves working in a global multi-site team specializing in areas such as Behavioral compiler and DPI, Clock Processing, Timing Analysis, Performance Tuning and Runtime Throughput. The responsibilities include innovating and brainstorming ideas to solve challenging practical problems, developing software based on the idea, and demonstrating the effectiveness of it by running benchmarking designs and comparing the results.
Job requirements:MS/Ph.D. Degree in Computer Science, Computer Engineering, or Electrical Engineering.10+ years of software development experience in developing and testing large C++ applications in Linux environment.Ability to understand complex problems and propose creative and efficient solutionsExperience with efficient algorithm and data structure design.Understanding of digital logic design, FPGA architecture, and hardware description language (like Verilog, System Verilog).EDA knowledge preferred, especially in partitioning, place-and-route, static timing analysis, synthesis or timing closure for large capacity and high-performance designs.Machine learning experience is preferred but not mandatory.Highly developed interpersonal skills and the ability to work well either in a team-based environment or autonomously.The base salary range across the U.S. for this role is between $152,000 - $228,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Stay Connected: Join our Talent Community
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
#LI-MS2
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