R&D Engineering, Staff Engineer
Synopsys (formerly Synfora)
Senior / Lead Embedded Software Developer
We are looking for highly experienced Embedded Software Developer to design and implement software for ARM embedded Processor subsystem which is part of the Versal Device.
Team will work with the FPGA based emulation solution, ZeBu, firmware team to develop Embedded software piece as well as guide any changes to the processor connections to the rest of the ZeBu infrastructure.
Optimize software performance and memory usage for resource-constrained embedded SW features.
Team will also work with the ZeBu runtime and debug teams to integrate solutions with current functions.
Requirements:Masters/Bachelor’s degree in Computer Science/Electronics EngineeringAt least 5 years of experience in embedded software developmentExperience with embedded operating systems (e.g. PetaLinux, FreeRTOS, Embedded Linux).Strong understanding of hardware/software interface and low-level programming concepts.Knowledge of device drivers and network protocols.Familiarity with HDL and FPGA programming
We are looking for highly experienced Embedded Software Developer to design and implement software for ARM embedded Processor subsystem which is part of the Versal Device.
Team will work with the FPGA based emulation solution, ZeBu, firmware team to develop Embedded software piece as well as guide any changes to the processor connections to the rest of the ZeBu infrastructure.
Optimize software performance and memory usage for resource-constrained embedded SW features.
Team will also work with the ZeBu runtime and debug teams to integrate solutions with current functions.
Requirements:Masters/Bachelor’s degree in Computer Science/Electronics EngineeringAt least 5 years of experience in embedded software developmentExperience with embedded operating systems (e.g. PetaLinux, FreeRTOS, Embedded Linux).Strong understanding of hardware/software interface and low-level programming concepts.Knowledge of device drivers and network protocols.Familiarity with HDL and FPGA programming
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