USC’s Information Sciences Institute (ISI), a unit of the university’s Viterbi School of Engineering, is a world leader in the research and development of advanced artificial intelligence, information processing, computing, and communications technologies. ISI’s 400 faculty, professional staff and graduate students carry out extraordinary information sciences research at three distinct locations - Marina Del Rey, CA; Arlington, VA; and Waltham, MA.

*This position is based in Arlington, VA. Hybrid work options are available *

The Computational Systems and Technology division at ISI is a leader in disrupting and advancing the fields of digital design, computer architecture and EDA tooling. As an applied research lab, our work spans the creation and maturation of ideas from academic conception to applied research prototypes.

CST staff can be found:

Researching and developing AI-enabled EDA tools for next generation systems,Developing full scale domain specific computational accelerators for emerging fields such as Fully Homomorphic Encryption and RF spectrum sharing,Performing experiments on the International Space Station,Utilizing ISI’s MOSIS service to fabricate novel computer architectures.

Our success is based on investing in our staff through a culture centered on:

Learning and idea generation,Accepting challenges, andContinual growth through contributing to, creating, and leading a research agenda.

We are looking for highly talented, motivated technical leaders to join our team. This position will lead research and propose major innovations in domain specific computing targeting ASICs and FPGAs. Research and develop high speed, compact on-chip communication and switching mechanisms that scale to full device solutions. Collaborate with team members developing custom EDA tools to perform design space exploration of custom architectures across unique performance parameters. Be an active member of a fast-paced ASIC Development team supporting the full life cycle from functional architecture definition to physical implementation, verification, and tape-out.  The successful candidate will also collaborate with peers within the group and across ISI; publish results in top tier conferences; and contribute to and lead proposals efforts.

Position specific JOB QUALIFICATIONS:

PhD or MS and equivalent experience in Computer Engineering, Electrical Engineering, or Computer Science required.Previous publications, patents, or innovations related to digital design, computer architecture, on-chip networking, EDA for digital design, or novel application mapping.Five years of digital design experience using Synopsys or Cadence CAD tools and commercial/academic cad flows.Five years of Hardware Description Language (Verilog, VHDL, or SystemVerilog) and Python development experience.Ability to evaluate, apply, and mature published research to real-world problems at scale on prototype systems.Ability to handle Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. Citizenship.

Preferred Job Qualifications:

Three years of experience with hardware/software co-design and design space exploration with heterogenous computing architectures.Successful tape out experience on modern foundry nodes (