**Change the world. Love your job.** As a Resolution Enhancement Techniques (RET) Engineer, you'll architect new TI products and make our customers' visions a reality. You'll define, design, model, implement, and document analog, digital, and RF integrated circuits (ICs). Responsibilities will include, but are not limited to: + Partnering with design, process engineering and process integration teams to develop mutually agreeable design specifications for manufacturing processes for advanced analog nodes + Developing/improving mask/lithography/etch processes for next node analog nodes through photolithographic simulation and on mask/wafer verification + Data collection, simulation and verification of optical proximity correction (OPC) models and recipes + Partnering with internal/external fabs to transfer processes for advanced analog nodes + Troubleshooting photolithographic patterning/alignment related issues for all fabs within TI **Responsibilities include:** + Drive process and device improvements through characterization, test, design of experiments, data analysis and simulation + Work with multiple process, integration, reliability, packaging and test engineers to achieve these goals + Work closely with the product groups to identify and optimize the resonator performance to meet critical final device parameters to enable game changing products in the market The person performing this role must be capable to plan effectively, drive schedules, meet critical deadlines on multiple tasks in parallel, lead technical discussions in their area of expertise, and work effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Qualifications - External** **Minimum requirements:** + Masters in Electrical Engineering, Physics, Computer Science, Chemistry or related degree + 10 + years experience in semiconductor photolithography and/or OPC development + FEOL lithography & OPC expertise for 45nm, 28nm, 22nm and 20nm processing nodes **Preferred qualifications:** + Expertise in double patterning and test structure requirements to validate OPC solutions + Strong knowledge/understanding of advanced front end of the line (FEOL) lithography processes, lithography simulation techniques, mask making and OPC techniques used in semiconductor manufacturing and process development + FEOL integration experience + Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and layout execution using test pattern generators and use of layout software like Virtuoso, KLayout + Programming experience in Unix environment + Understanding of OPC pattern validation methodologies and process window assessment techniques like KLA’s Process Window Qualification (PWQ) + Demonstrated strong analytical and problem solving skills + Strong verbal and written communication skills + Ability to work in teams and collaborate effectively with people in different functions + Strong time management skills that enable on-time project delivery + Demonstrated ability to build strong, influential relationships + Ability to work effectively in a fast-paced and rapidly changing environment + Ability to take the initiative and drive for results