SummaryPosted: Nov 5, 2024Role Number:200577462At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a results-oriented and extraordinarily hardworking RTL Design Engineer. As a member of our multifaceted group, you will have the outstanding and great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. In this highly technical role, you will get to specify, design, and help in the verification and lab bring-up of sophisticated mixed-signal circuits (digital side)DescriptionDescriptionIn this role, you will assist with specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing substantial assertions, debugging code, and otherwise interacting with the design verification team. You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.Minimum QualificationsMinimum QualificationsBS degree in technical discipline with minimum 10 years of relevant experience.Key QualificationsKey QualificationsPreferred QualificationsPreferred QualificationsExtensive knowledge of mixed signal conceptsRelevant and proven experience of RTL design, Verilog and SystemVerilogDeep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers)Validated experience with synthesis, static timing, DFT, is a plusProven knowledge of SystemVerilog assertions, checkers, and other design verification techniques are a plusKnowledge of scripting languages. Perl and Python are plussesStrong communication, collaboration and presentation skillsEducation & ExperienceEducation & ExperienceAdditional RequirementsAdditional RequirementsMore

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