NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work , to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.

What you'll be doing:

As a member in our team, you will help develop and deploy DFT verification methodologies for various DFT features in our next generation products.

Help define and develop tesplans, testbenches and checkers based on review of functional description of DFT designs.

Develop or modify full chip verification infrastructure based on advanced verification methodologies.

Support emulation sign off of DFT features by collaborating with cross functional teams and also actively support post silicon bring up

You will also help mentor junior engineers on test designs and trade-offs including cost and quality.

What we need to see:

BSEE (or equivalent experience) with 5+, MSEE with 3+ years of experience or PhD in DFT or related domains

Experience in developing robust test plans and building verification infrastructure for pre-si validation and post-si bring up.

Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development

Demonstrated knowledge and expertise in defining scan test plans, BIST including memories and IOs, fault modeling, ATPG and fault simulation

Excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs using vendor tools

Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs

Strong programming and scripting skills in Perl, Python or Tcl desired

Extraordinary written and oral communication skills with the curiosity to work on rare challenges

NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most resourceful and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you!

The base salary range is 128,000 USD - 258,750 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.