Employer: Auris Health, Inc.

Job Title: Senior FPGA Test Engineer - Visualization

Job Code: A011.4977

Job Location:Santa Clara, CA

Job Type: Full-Time

Rate of Pay: $170,000 - $198,000/year

Job Duties: Develop a comprehensive UVM verification environment with attention to detail in designing verification components, scoreboards, test cases, stimulus generation, assertion, and coverage analysis. Develop test plans used to detect and document design discrepancies found during the verification process, collaborating with design engineers to resolve them. Integrate verification IP in UVM verification environment. Investigate and resolve complex issues that arise during verification, including those related to hardware and software interactions. Identify and mitigate potential risks in the RTL design and verification process and clearly document to meet the regulatory requirements. Work in seamless collaboration with the larger test team. Work on improving the overall verification process by developing and implementing advanced verification methodologies and best practices.

Employer: Auris Health, Inc.

Job Title: Senior FPGA Test Engineer - Visualization

Job Code: A011.4977

Job Location:Santa Clara, CA

Job Type: Full-Time

Rate of Pay: $170,000 - $198,000/year

Job Duties: Develop a comprehensive UVM verification environment with attention to detail in designing verification components, scoreboards, test cases, stimulus generation, assertion, and coverage analysis. Develop test plans used to detect and document design discrepancies found during the verification process, collaborating with design engineers to resolve them. Integrate verification IP in UVM verification environment. Investigate and resolve complex issues that arise during verification, including those related to hardware and software interactions. Identify and mitigate potential risks in the RTL design and verification process and clearly document to meet the regulatory requirements. Work in seamless collaboration with the larger test team. Work on improving the overall verification process by developing and implementing advanced verification methodologies and best practices.

Requirements: Employer will accept a Master's degree in Electrical Engineering, Computer Engineering or related field and 3 years of experience in the job offered or in Senior FPGA Test Engineer-related occupation.

This job posting is anticipated to close on 12/23/2024. The Company may however extend this time-period, in which case the posting will remain available onhttps://www.careers.jnj.comto accept additional applications.

Employees and/or eligible dependents may be eligible to participate in the following Company sponsored employee benefit programs: medical, dental, vision, life insurance, short- and long-term disability, business accident insurance, and group legal insurance.

Employees may be eligible to participate in the Company’s consolidated retirement plan (pension) and savings plan (401(k)).

This position is eligible to participate in the Company’s long-term incentive program.

Employees are eligible for the following time off benefits:

Vacation – up to 120 hours per calendar yearSick time - up to 40 hours per calendar year; for employees who reside in the State of Washington – up to 56 hours per calendar yearHoliday pay, including Floating Holidays – up to 13 days per calendar yearWork, Personal and Family Time - up to 40 hours per calendar year

Additional information can be found through the link below.

For additional general information on Company benefits, please go to: -https://www.careers.jnj.com/employee-benefits

Johnson Johnson is an Affirmative Action and Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, age, national origin, or protected veteran status and will not be discriminated against on the basis of disability.

For more information on how we support the whole health of our employees throughout their wellness, career and life journey, please visitwww.careers.jnj.com.

Requirements: Employer will accept a Master's degree in Electrical Engineering, Computer Engineering or related field and 3 years of experience in the job offered or in Senior FPGA Test Engineer-related occupation.

This job posting is anticipated to close on 12/23/2024. The Company may however extend this time-period, in which case the posting will remain available onhttps://www.careers.jnj.comto accept additional applications.

Employees and/or eligible dependents may be eligible to participate in the following Company sponsored employee benefit programs: medical, dental, vision, life insurance, short- and long-term disability, business accident insurance, and group legal insurance.

Employees may be eligible to participate in the Company’s consolidated retirement plan (pension) and savings plan (401(k)).

This position is eligible to participate in the Company’s long-term incentive program.

Employees are eligible for the following time off benefits:

Vacation – up to 120 hours per calendar yearSick time - up to 40 hours per calendar year; for employees who reside in the State of Washington – up to 56 hours per calendar yearHoliday pay, including Floating Holidays – up to 13 days per calendar yearWork, Personal and Family Time - up to 40 hours per calendar year

Additional information can be found through the link below.

For additional general information on Company benefits, please go to: -https://www.careers.jnj.com/employee-benefits

Johnson Johnson is an Affirmative Action and Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, age, national origin, or protected veteran status and will not be discriminated against on the basis of disability.

For more information on how we support the whole health of our employees throughout their wellness, career and life journey, please visitwww.careers.jnj.com.