Company:Qualcomm India Private Limited

Job Area:Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Qualcomm SoC Verification Engineer

The candidate will be responsible to own SoC Interconnect DV (Connectivity matrix, Coherency, Clock gating, Performance etc) during the project work.

Responsibilities :

Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.Work alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide relevant solution to issue.Collaborate with architects, designers, and pre and post silicon verification teams.

Skillsets/Requirements :

B.E/B.Tech/M.E/M.Tech in Electronics with 7+ year experience in verification domain.Good understanding of Soc level verification testbench and flows.Prior work on NoC/Interconnects end to end verification with solid understanding on to Bus protocols, Coherency, Performance, Latency, clock gating etc.Working knowledge of Interconnect architecture and Bus protocols like AMBA - ACE/CHI/AXI.Solid hands-on working experience on System Verilog and UVM methodology. Expert in handling protocol BFM/VIP integration and traffic sequence development.Experience in coding assertions and functional coverage bins.

Qualcomm Power DV Engineer

We are looking for passionate, highly motivated, and creative individuals to be part of our Power Verification team. As the power team member, you will work on projects that will define the next generation of Modem, Mobile, XR/VR and Automotive chips and systems. You will get firsthand exposure to high performance CPU and Memory sub-systems, NOC based Interconnect Fabric, High speed IO's, cutting edge power optimization techniques, Functional safety aspects and many other leading technologies deployed in our Snapdragon chips.

General Summary
Qualcomm Power DV team is responsible for the verification of Power Controller sub-system that powers up/controls the clock/voltage/operating level/power for the entire SoC. Along with the complex power controllers, the team is responsible for verification of various sensors and the respective controllers, Power limits management IPs and the IPs interacts with the external PMIC. In the role of Power Verification Engineer, you are expected to understand the Low power design functionality and verification strategies and driver the overall SoC low power verification.

The Responsibilities Will Majorly Include
 

Understanding of SoC power domains and HW programming guide sequencesDevelop test plan to verify all low power aspects across all modes of verification – RTL, PA-RTL, PA-GLS and FormalOwn end to end DV tasks from coding Test bench and test cases, write assertions, debugging UPF and RTL and achieving all coverage goalsParticipate in post Si debug and bring-up activitiesExploring innovative dynamic or static methodologies by engaging with EDA vendorsWork with architects, designers, FPGA and post-silicon teams to ensure that the IPs are verified/validated thoroughly.

Preferred Qualifications:

Strong System Verilog/UVM based verification skills & Experience with Assertion & coverage-based verification methodologyGood understanding of low power design techniquesProficient with low power SoC design constructs such as clock gates, level shifters, isolation cells and state retention cells.Experience with UPF/CPF based power aware verification.Working knowledge of GLS , PAGLS and scripting languages such as Perl, Python is a plusBus protocols (AHB/AXI/APB)C/C++ with any ARM core knowledgeExposure to Formal/Static verification methodologies and Post-Si debugs would be excellentGood debugging and analytical skills.Good interpersonal skills, ability to work as an excellent teammateExcellent communication skills to collaborate with cross-cultural teams and work in a matrix organization

BTech/MTech with below years of experience in verification closure of complex Unit, Sub-system or SOC level verification.

5 To 12 Years of experience to lead Power DV of one or more SoCs

Qualcomm SOC DV Engineer (MM)

As a DV Engineer with a focus on SOC design verification, you will work to understand the internal requirements and complexities of our highly complex auto, compute, mobile, XR-VR, IoT SOCs and architect the required verification strategy. You will help set up methodologies, develop test plans, and verify that the design meets the highest quality standards. We believe in early involvement of DV, so you will also participate in architecture/product definition through early involvement in the product life-cycle.

Minimum qualifications

BE/BS degree in Electrical Engineering with 5+ years of practical experienceStrong fundamentals in digital ASIC verificationExperience in IP/SS/SoC level verification of medium to high complexity designKnowledge of one or more of Multimedia design blocks such as Display/Camera/Video/GFxFamiliarity with system level HW and SW Debug techniques and Verification requirements

Preferred qualifications

MS degree in Electrical Engineering; 4+ years of practical experienceExpertise in IP/SS/System level verification flows of one or more of Multimedia design blocksFamiliarity with one or more of the bus standard interface protocols for Multimedia designs, such as DisplayPort/HDMI/CSI/DSIExposure to ARM Core debugging techniques would be a plusStrong understanding of AMBA bus protocolsA good understanding of the complete verification life cycle (test plan, testbench through coverage closure)Extensive knowledge in multiple testbench structuresExposure to FPGA and emulation platform debugsProficiency in UVM, C/C++Experience w/ PSS or higher-level test construction languages is an added advantageKnowledge of assertion-based formal verification is an added advantageAdditional Job Description

Roles and Responsibilities

Define verification architecture, develop test plans and build verification environmentWork with design team to understand design intent and bring up verification plans and schedulesVerify Subsystems and Full SoC using advanced verification methodologiesBuild agents and checkers from scratch. Perform and write test plan from design architecture specs and/or protocol standardDebug test cases and report verification result to achieve expected code/functional coverage goalAssist in silicon bring-up, debug and characterization

Qualcomm SOC Verification Engineer (Debug)

As verification engineer candidate will be responsible to own SoC Debug DV (Crash reset, Trace, debug infra etc) during project work.

Responsibilities :

Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.Work alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide relevant solution to issue.Collaborate with architects, designers, and pre and post silicon verification teams.

Skillsets/Requirements :

B.E/B.Tech/M.E/M.Tech in Electronics with 7+ year experience in verification domain.Good understanding of Soc level verification testbench and flows.Working knowledge and design understanding of Debug architecture of a SoC which includes Crash flow, JTAG, Trace, triggers, monitors, Scandump etc.Exposure to Power aware simulations and Gate Level simulationsGood understanding of processor based Soc level verification which includes Verilog, System Verilog and UVM based environment.Good understanding of AHB/AXI & ATB-AMBA protocol.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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