We are looking for an engineer with theoretical knowledge and practical experience to contribute to the lab team.
As a Test & Validation Engineering, you will be part of an R&D team developing high speed SerDes PHYs.
You will work with a cross functional design team of analog designers and hardware engineers from a wide variety of backgrounds. Our R&D test lab contains high speed test equipment, examples include: 50 GHz oscilloscopes, 67GHz network analyzer, and 112Gb/s BERTs for SerDes test and debug.
Responsibilities and Duties
Qualifications
A relevant degree in Electronic EngineeringStrong Analog IC circuit knowledgeStrong debugging skillsSerDes test conceptsSoftware programming experience (MATLAB, Python are preferences)FPGA programming knowledge (Verilog)Knowledge of interface protocols such as Ethernet, PCIe, SATA, and USB3.1PCB design knowledge (Altium Designer)Knowledge of communication interfaces such as JTAG, I2C and SPIGood English communication skillsAbout Synopsys
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
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Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.