Santa Clara, California
1 day ago
Validation Lead Memory Coherency Fabric Systems
Job Description

Validation Lead Memory Coherency Fabric Systems responsibilities include but are not limited to:

Proven leader in functional verification of Complex IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.

Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.

Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests.

Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.

Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.

Maintains and improves existing functional verification infrastructure and methodology.

Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Collaborate with Post-si, Emulation and formal team to define and validate IP


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Education Requirement

The candidate must possess one of the following

Graduate of Bachelor's degree in electrical engineering, Computer Engineering, or a related field with at least 15+ years' experience in pre-silicon verification/validation of SoC designs, with expertise in memory systems and interconnect architectures OR;

Graduate of Master's degree in electrical engineering, Computer Engineering, or a related field with at least 12+ years' experience in pre-silicon verification/validation of SoC designs, with expertise in memory systems and interconnect architectures OR;

Graduate of PhD in Electrical Engineering, Computer Engineering, or a related field with at least 8+ years' experience in pre-silicon verification/validation of SoC designs, with expertise in memory systems and interconnect architectures.


3 years of technical experience in the following;

Knowledge of memory coherency protocols (e.g., MESI, MOESI, CXL, CCIX, CHI). 

Proficiency in System Verilog and UVM for building robust testbenches.

Experience with simulation tools such as Synopsys VCS, Cadence Xcelium

Expertise in debugging tools like Verdi, DVE, or SimVision.

Knowledge with performance analysis tools and techniques.

Experience with scripting languages such as Python, Perl, or TCL for workflow automation


Preferred Skills/Qualifications:

Knowledge with post-silicon validation and system bring-up processes.

Knowledge of NoC architectures and interconnect protocols (e.g., AMBA AXI, ACE).

Knowledge in AI/ML accelerators or data center SoC validation.

Experience with high-bandwidth memory (HBM), DDR, or similar memory technologies.

Understanding of formal verification techniques.


Inside this Business Group
The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US, Boxborough


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in the US $186,070.00-$262,680.00
*Salary range dependent on a number of factors including location and experience


Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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